The The problem
One of the important steps in the manufacturing of IC devices is the measurement of a large set of ET parameters on special areas located on each wafer. These measurements serve two main purposes: one is checking the quality of the wafer. The second is screening, when wafers that failed the tests are scrapped.

ET parameters are not stable by their nature. ET parameter deviations can be related to certain process stages and a correction of the process can be initiated. In many cases, it is extremely difficult to determine from the data whether a process change really occurred. In such cases wafers will pass to the next step, the SORT. Here product dies are all checked and classified into good dies and bad dies. A lack of ability to detect problems in the ET step will result in a high scrap rate at the SORT. At this point it is more difficult to associate the SORT failures with process problems.

The problem reveals itself when analysis of ET data shows no deviation in the parameters, but the yield of the batch at Sort falls short of expectations. In this situation the engineers are unable to discover, in a systematic way, the source of the fault in the manufacturing process that caused the degradation of yield.


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